DIFF=DISABLED, WORD=DISABLED, MAXS0=TRIG_EVENT, MAXS1=TRIG_EVENT
Mode Register
| MAXS0 | Max Speed Mode for Channel 0 0 (TRIG_EVENT): External trigger mode or Free-running mode enabled. (See TRGENx.DACC_TRIGR.) 1 (MAXIMUM): Max speed mode enabled. |
| MAXS1 | Max Speed Mode for Channel 1 0 (TRIG_EVENT): External trigger mode or Free-running mode enabled. (See TRGENx.DACC_TRIGR.) 1 (MAXIMUM): Max speed mode enabled. |
| WORD | Word Transfer Mode 0 (DISABLED): One data to convert is written to the FIFO per access to DACC. 1 (ENABLED): Two data to convert are written to the FIFO per access to DACC (reduces the number of requests to DMA and the number of system bus accesses). |
| ZERO | Must always be written to 0. |
| DIFF | Differential Mode 0 (DISABLED): DAC0 and DAC1 are single-ended outputs. 1 (ENABLED): DACP and DACN are differential outputs. The differential level is configured by the channel 0 value. |
| PRESCALER | Peripheral Clock to DAC Clock Ratio |